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sunplus technology reserves the right to change this documentation with out prior notice. information provided by sunplus technology is believed to be accurate and reliable. however, sunplus technology makes no warranty for any errors which may appear in this document. contact sunplus technology to obtain the latest version of device specifications before placing your order. no responsibility is assumed by sunplus technology for any infringement of patent or other rights of third parties which may result from its use. in addition, sunplus produ cts are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express wr itten approval of sunplus. mar . 10 , 2005 version 1.4 s s p p l l c c 7 7 8 8 3 3 a a 1 1 6 6 c c o o m m / / 8 8 0 0 s s e e g g c c o o n n t t r r o o l l l l e e r r / / d d r r i i v v e e r r
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 2 mar . 10 , 200 5 version: 1. 4 table of contents page 1. general description ................................ ................................ ................................ ................................ ................................ .......... 4 2. block diagram ................................ ................................ ................................ ................................ ................................ ...................... 4 3. features ................................ ................................ ................................ ................................ ................................ ................................ .. 4 4. signal descriptions ................................ ................................ ................................ ................................ ................................ ............ 5 4.1. pin m ap ................................ ................................ ................................ ................................ ................................ ............................... 6 5. functional descriptions ................................ ................................ ................................ ................................ ................................ .. 7 5.1. o scillator ................................ ................................ ................................ ................................ ................................ .......................... 7 5.2. c ontrol and d isplay i nstructions ................................ ................................ ................................ ................................ ................... 7 5.3. i nstruction t able ................................ ................................ ................................ ................................ ................................ ............... 9 5.4. 8 - b it o peration and 8 - d igit 1 - l ine d isplay (u sing i nternal r eset ) ................................ ................................ .............................. 10 5.5. 4 - b it o peration and 8 - d igit 1 - l ine d isplay (u sing i nternal r eset ) ................................ ................................ ............................... 11 5.6. 8 - b it o peration and 8 - d igit 2 - l ine d isplay (u sing i nternal r eset ) ................................ ................................ ............................... 11 5.7. reset f unction ................................ ................................ ................................ ................................ ................................ ............... 12 5.8. d isplay d ata ram (dd ram) ................................ ................................ ................................ ................................ ............................ 14 5.9. t iming g eneration c ircuit ................................ ................................ ................................ ................................ ............................... 14 5.10. lcd d river c ircuit ................................ ................................ ................................ ................................ ................................ ....... 14 5.11. c haracter g enerator rom (cg rom) ................................ ................................ ................................ ................................ ....... 14 5.12. c haracter g enerator ram (cg ram) ................................ ................................ ................................ ................................ ........ 14 5.13. c ursor /b link c ontrol c ircuit ................................ ................................ ................................ ................................ .................... 18 5.14. i nterfacing to mpu ................................ ................................ ................................ ................................ ................................ ....... 19 5.15. s upply v oltage for lcd d rive ................................ ................................ ................................ ................................ ..................... 20 5.16. register --- ir (i nstruction r egister ) and dr (d ata r egister ) ................................ ................................ ............................. 23 5.17. b usy f lag (bf) ................................ ................................ ................................ ................................ ................................ ............... 23 5.18. a ddress c ounter (ac) ................................ ................................ ................................ ................................ ................................ .. 23 5.19. i/o p ort c onfiguration ................................ ................................ ................................ ................................ ................................ 23 6. electrical specifications ................................ ................................ ................................ ................................ ............................. 24 6.1. a bsolute m aximum r atings ................................ ................................ ................................ ................................ ............................. 24 6.2. dc c haracteristics (vdd = 2.7v to 4.5v, t a = 25 ) ................................ ................................ ................................ ..................... 24 6.3. ac c haracteristics (vdd = 2.7v to 4.5v, t a = 25 ) ................................ ................................ ................................ ..................... 25 6.4. dc c haracteristics (vdd = 4.5v to 5.5v, ta = 2 5 ) ................................ ................................ ................................ ..................... 26 6.5. ac c haracteristics (vdd = 4.5v to 5.5v, t a = 25 ) ................................ ................................ ................................ ..................... 26 7. application circuits ................................ ................................ ................................ ................................ ................................ ......... 29 7.1. r - o scillator ................................ ................................ ................................ ................................ ................................ .................... 29 7.2. i nterface to mpu ................................ ................................ ................................ ................................ ................................ ............. 29 7.3. SPLC783A a pplication c ircuit ................................ ................................ ................................ ................................ ........................ 30 7.4. a pplications for lcd ................................ ................................ ................................ ................................ ................................ ...... 30 8. character generator rom ................................ ................................ ................................ ................................ ........................... 33 8.1. SPLC783A - 001 ................................ ................................ ................................ ................................ ................................ ................ 33 8.2. SPLC783A - 003 ................................ ................................ ................................ ................................ ................................ ................ 34 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 3 mar . 10 , 200 5 version: 1. 4 9. package/pad locations ................................ ................................ ................................ ................................ ................................ ... 35 9.1. pad a ssignment and l ocations ................................ ................................ ................................ ................................ ....................... 35 9.2. p ackage i nformation ................................ ................................ ................................ ................................ ................................ ....... 35 9.3. o rdering i nformation ................................ ................................ ................................ ................................ ................................ ..... 35 9.4. s tor age c ondition and p eriod for p ackage ................................ ................................ ................................ ................................ . 36 9.5. r ecommended smt t emperature p rofile ................................ ................................ ................................ ................................ ...... 36 10. disclaimer ................................ ................................ ................................ ................................ ................................ ............................. 37 11. revision history ................................ ................................ ................................ ................................ ................................ ................. 38 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 4 mar . 10 , 200 5 version: 1. 4 16com/80seg controller/driver 1. general description the SPLC783A, a dot - matrix lcd controller and driver from sunplus, is a unique design for displaying alpha - numeric , japanese - kana characters and symbols. the SPLC783A provides two types of interfaces to mpu: 4 - bit and 8 - bit interfaces. the transferring speed of 8 - bit is twice faster than 4 - bit. a single SPLC783A is able to display up to two 16 - character lines. by cascading with splc100 or splc063, the display capability can be extended. the cmos technology ensures the power saves in the most efficient way and the performance keeps in the highest rank. 2. block diagram clk1, clk2 m com1- com16 seg1- seg80 d osc1 osc2 i / o buffer timing generation circuit 80 segments x 16 commons lcd driver character generator rom 80-bit shift register latch circuit 16-bit shift register parallel to serial data conversion circuit cursor blink control circuit character generator ram display data ram 80 bytes address counter instruction register data register busy flag instruction decorder e rs r / w power supply for lcd drive : (v1-v5) 5 5 8 8 8 8 7 7 7 8 7 8 80 16 80 vdd vss db0-db3 db4-db7 3. features ? charac ter generator rom: 10880 bits g character font 5 x 8 dots: 192 characters g character font 5 x 10 dots: 64 characters ? character generator ram: 512 bits g character font 5 x 8 dots: 8 characters g character font 5 x 10 dots: 4 characters ? 4 - bit o r 8 - bit mpu interfaces ? direct driver for lcd: 16 coms x 8 0 segs ? duty factor (selected by program): g 1/8 duty: 1 line of 5 x 8 dots g 1/11 duty: 1 line of 5 x 10 dots g 1/16 duty: 2 lines of 5 x 8 dots / line ? built - in power on automatic reset circuit ? built - in oscillator circuit (with external resistor) ? support external clock operation ? low power consumption ? package form: bare chip available sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 5 mar . 10 , 200 5 version: 1. 4 4. signal descriptions mnemonic p in no. type description vdd 49 i power input vss 34 i groun d osc1 osc2 36 35 - both osc1 and osc2 are connected to resistor for internal oscillator circuit. for external clock operation, the clock is input to osc1. v 1 - v5 37 - 41 i supply voltage for lcd driving. e 48 i a start signal for reading or writing d ata. r / w 47 i a signal for selecting read or write actions. 1: read, 0: write. rs 46 i a signal for selecting registers. 1: data register (for read and write) 0: instruction register (for write), busy flag - address counter (for read). db 0 - db3 50 - 53 i/o low 4 - bit data db 4 - db7 54 - 57 i/o high 4 - bit data clk1 42 o clock to latch serial data d. clk2 43 o clock to shift serial data d. m 44 o switch signal to convert lcd waveform to ac. d 45 o sends character pattern data corresponding to each common signal serially. 1: selection, 0: non - selection. seg1 - seg33 seg34 - seg80 33 - 1 121 - 75 o segment signals for lcd. com1 - com16 59 - 74 o common signals for lcd. test 58 i test pin. this pin must be fixed to vdd or open. sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 6 mar . 10 , 200 5 version: 1. 4 4.1. pin map 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 69 70 71 72 73 74 75 76 77 65 66 67 68 1 2 8 1 2 7 1 2 6 1 2 5 1 2 4 1 2 3 1 2 2 1 2 1 1 2 0 1 1 9 1 1 8 1 1 7 1 1 6 1 1 5 1 1 4 1 1 3 1 1 1 1 1 0 1 0 9 1 0 8 1 0 7 1 0 6 1 0 5 1 0 4 1 0 3 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 6 1 6 2 6 3 6 4 1 1 2 3 9 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 34 33 32 31 30 29 28 27 26 38 37 36 35 seg60 seg61 seg62 seg63 seg64 seg65 seg66 seg67 seg68 seg69 seg70 seg71 seg72 seg73 seg74 seg75 seg76 seg77 seg78 seg79 seg80 com16 com15 com14 com13 com12 com11 com10 com9 com8 com7 com6 com5 com4 com3 com2 com1 nc s e g 5 9 s e g 5 8 s e g 5 7 s e g 5 6 s e g 5 5 s e g 5 4 s e g 5 3 s e g 5 2 s e g 5 1 s e g 5 0 s e g 4 9 s e g 4 8 s e g 4 7 s e g 4 6 s e g 4 5 s e g 4 4 s e g 4 3 s e g 4 2 s e g 4 1 s e g 4 0 s e g 3 9 s e g 3 8 s e g 3 7 s e g 3 6 s e g 3 5 s e g 3 4 nc seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 vss osc2 osc1 nc n c t e s t d b 7 d b 6 d b 5 d b 4 d b 3 d b 2 d b 1 d b 0 v d d e r / w r s d m c l k 2 c l k 1 v 5 v 4 v 3 v 2 v 1 n c n c n c sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 7 mar . 10 , 200 5 version: 1. 4 5. function al description s 5.1. oscillator SPLC783A oscillator supports not only the internal oscillator operation, but also the external clock operation. 5.2. control a nd display instructions control and display instructions are described in details as follows: 5.2.1. clear display it clears the entire display and sets display data ram address 0 in address counter. 5.2.2. return h ome x: do not care (0 or 1) it sets display data ram address 0 in address counter and the display returns to its original position. the cursor or blink goes to the most - left side of the dis play (to the 1st line if 2 lines are displayed). the contents of the display data ram do not change. 5.2.3. entry mode set during writing and reading data, it defines cursor moving direction and shifts the display. i / d = 1: increment, i / d = 0: decrement. s = 1: the display shift, s = 0: the display does not shift. s = 1 i / d = 1 it shifts the display to the left s = 1 i / d = 0 it shifts the display to the right 5.2.4. display on/off control d = 1: display on, d = 0: display off c = 1: cursor on, c = 0: cursor off b = 1: blinks on, b= 0: blinks of f 5.2.5. cursor or d isplay s hift without changing dd ram data, it moves cursor and shifts display. s/c r/l description address c ounter 0 0 shift cursor to the left ac = ac - 1 0 1 shift cursor to the right ac = ac + 1 1 0 shift display to the left. cursor follows the display shift ac = ac 1 1 shift display to the right. cursor follows the display shift ac = ac db7 code rs r/w 1 db6 db5 db4 db3 db2 db1 db0 0 0 0 0 0 0 0 0 0 db7 code rs r/w x db6 db5 db4 db3 db2 db1 db0 0 0 0 0 0 0 0 0 1 db7 code rs r/w s db6 db5 db4 db3 db2 db1 db0 0 0 0 0 0 0 0 1 i / d db7 code rs r/w b db6 db5 db4 db3 db2 db1 db0 0 0 0 0 0 0 1 d c cursor 5 x 8 dot character font 5 x 10 dot character font 8th line 11th line db7 code rs r/w x db6 db5 db4 db3 db2 db1 db0 0 0 0 0 0 1 s/c r/l x blink display alternately sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 8 mar . 10 , 200 5 version: 1. 4 5.2.6. functio n s et x: do not care (0 or 1) dl: it sets interface data length. dl = 1: data transferred with 8 - bit length (db 7 - 0 ). dl = 0: data transferred with 4 - bit lengt h (db 7 - 4 ). it requires two times to accomplish data transferring. n: it sets the number of the display line. n = 0: one - line display. n = 1: two - line display. f: it sets the character font. f = 0: 5 x 8 dots character font. f = 1: 5 x 10 dots character font. n f no. of display lines character font duty factor 0 0 1 5 x 8 dots 1 / 8 0 1 1 5 x 10 dots 1 / 11 1 x 2 5 x 8 dots 1 / 16 it cannot display two li nes with 5 x 10 dots character font. 5.2.7. set character generator ram address it sets character generator ram address (aaaaaa)2 to the address counter. character ge nerator ram data can be read or written after this setting. 5.2.8. set display data ram address it sets display data ram address (aaaaaaa) 2 to the address counter. d isplay data ram can be read or written after this setting. in one - line display (n = 0), (aaaaaaa) 2: (00) 16 - (4f) 16. in two - line display (n = 1), (aaaaaaa) 2: (00) 16 - (27) 16 for the first line, (aaaaaaa) 2: (40) 16 - (67) 16 for the second line. 5.2.9. read b usy f lag and a ddress when bf = 1, it indicates the system is busy now and it will not accept any instruction until not busy (bf = 0). at the same time, the content of address counter (aaaaaaa) 2 is read. 5.2.10. write d ata to c haracter g enerator ram or d isplay d ata ram it writes data (dddddddd) 2 to character generator ram or display data ram. 5.2.11. read d ata from c haracter g enerator ram or d isplay d ata ram it reads data (dddddddd) 2 from character generator ram or display data ram. to r e a d d a ta c o r r e c t l y, d o t h e f o l l o w i n g : 1). the address of the character generator ram or display data ram or shift the cursor instruction. 2). the read instruction. db7 code rs r/w x db6 db5 db4 db3 db2 db1 db0 0 0 0 0 1 dl n f x db7 code rs r/w a db6 db5 db4 db3 db2 db1 db0 0 1 bf a a a a a a db7 code rs r/w a db6 db5 db4 db3 db2 db1 db0 0 0 0 1 a a a a a db7 code rs r/w a db6 db5 db4 db3 db2 db1 db0 0 0 1 a a a a a a db7 code rs r/w d db6 db5 db4 db3 db2 db1 db0 1 0 d d d d d d d db7 code rs r/w d db6 db5 db4 db3 db2 db1 db0 1 1 d d d d d d d sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 9 mar . 10 , 200 5 version: 1. 4 5.3. instruction table instruction code execution time instruction rs r/w db7 db6 db5 db4 db3 db2 db1 db0 description fosc= 190khz f osc= 270khz f osc= 350khz clear display 0 0 0 0 0 0 0 0 0 1 write "20h" to ddram and set ddram address to "00h" from ac 2.16ms 1.52ms 1.18ms return home 0 0 0 0 0 0 0 0 1 - set ddram address to "00h" from ac and return cursor to its original position if shifted. the contents of ddram are not changed. 2.16ms 1. 52ms 1.18ms entry mode set 0 0 0 0 0 0 0 1 i/d s assign cursor moving direction and enable the shift of entire display 53 ? s 38 ? s 29 ? s display on/ off control 0 0 0 0 0 0 1 d c b set display (d), cursor(c), and blinking of cursor(b) on/off control bit. 53 ? s 38 ? s 29 ? s cursor or display shift 0 0 0 0 0 1 s/c r/l - - set cursor moving and display shift control bit, and the direction, without changing of ddram data. 53 ? s 38 ? s 29 ? s function set 0 0 0 0 1 dl n f - - set interface data length (dl: 8 - bit/4 - bit), numbers of display line (n: 2 - line/1 - line) and, display font type (f:5x10 dots/5x8 dots) 53 ? s 38 ? s 29 ? s set cgram address 0 0 0 1 ac5 ac4 ac3 ac2 ac1 ac0 set cgram address in address counter. 53 ? s 38 ? s 29 ? s set ddram address 0 0 1 ac6 ac5 ac4 ac3 ac2 ac 1 ac0 set ddram address in address counter 53 ? s 38 ? s 29 ? s read busy flag and address counter 0 1 bf ac6 ac5 ac4 ac3 ac2 ac1 ac0 whether during internal operation or not can be known by reading bf. the contents of address counter can also be read. wri te data to ram 1 0 d7 d6 d5 d4 d3 d2 d1 d0 write data into internal ram (ddram/cgram). 53 ? s 38 ? s 29 ? s read data from ram 1 1 d7 d6 d5 d4 d3 d2 d1 d0 read data from internal ram (ddram/cgram). 53 ? s 38 ? s 29 ? s note: " - ": don't care sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 10 mar . 10 , 200 5 version: 1. 4 5.4. 8 - bit operation a nd 8 - d igit 1 - line display (using internal reset) no. instruction display operation 1 power on. (SPLC783A starts initializing) power on reset. no display. 2 function set db7 rs r/w db6 db5 db4 db3 db2 db1 db0 0 0 1 1 0 0 x x 0 0 set to 8 - bit operation and select 1 - line display line and character font. 3 display on / off control 0 0 0 0 1 1 1 0 0 0 _ display on. cursor appear. 4 entry mode set 0 0 0 0 0 1 1 0 0 0 _ increase address by one. it will shift the cursor to the right when writing to the dd ram/cg ram. now the display has no shift. 5 write data to cg ram / dd ram 0 1 0 1 0 1 1 1 1 0 w_ write " w ". the cursor is increme nted by one and shifted to the right. 6 write data to cg ram / dd ram 0 1 0 0 0 1 0 1 1 0 we_ write " e ". the cursor is incremented by one and shifted to the right. 7 : : 8 write data to cg ram / dd ram 0 1 0 0 0 1 0 1 1 0 welcome_ write " e ". the cursor is incremented by one and shifted to the right. 9 entry mode set 0 0 0 0 0 1 1 1 0 0 welcome_ set mode for display shift when writing 10 write data to cg ram / dd ram 0 0 1 0 0 0 0 0 1 0 elcome _ write " "(space). the cursor is incremented by one and shifted to the right. 11 write data to cg ram / dd ram 0 1 0 0 0 0 1 1 1 0 lcome c_ write " c ". the cursor is incremented by one and shifted to the right. 12 : : 13 write data to cg ram / dd ram 0 1 0 1 1 0 0 1 1 0 compamy_ write " y ". the cursor is incremented by one and shifted to the right. 14 cursor or display shift 0 0 0 1 0 0 x x 0 0 compamy_ only shift the cursor's position to the left (y). 15 cursor or display shift 0 0 0 1 0 0 x x 0 0 compamy_ only shift the cursor's position to the left (m). 16 write da ta to cg ram / dd ram 0 1 0 0 1 1 1 0 1 0 ompany_ write " n ". the display moves to the left. 17 cursor or display shift 0 0 0 1 1 1 x x 0 0 compamy_ shift the display and the cursor's position to the right. 18 cursor or display shift 0 0 0 1 0 1 x x 0 0 ompany_ shift the display and the cursor's position to the right. 19 write data to cg ram / dd ram 0 1 0 0 0 0 0 0 1 0 compamy_ write " " (space). the cursor is incremented by one and shifted to the right. 20 : : : 21 return home 0 0 0 0 0 0 1 0 0 0 welcome_ both the display and the cursor return to the original position (address 0). sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 11 mar . 10 , 200 5 version: 1. 4 5.5. 4 - bit operation a nd 8 - digit 1 - line display (using internal reset) no. instruction display operation 1 power on. (SPLC783A starts initializing) power on reset. no display. 2 function set db7 rs r/w db6 db5 0 0 1 0 0 0 db4 se t to 4 - bit operation. 3 0 0 1 0 0 0 0 0 x x 0 0 set to 4 - bit operation and select 1 - line display line and character font. 4 0 0 0 0 0 0 1 1 1 0 0 0 _ display on. cursor appears. 5 0 0 0 0 0 0 0 1 1 0 0 0 _ increase address by one. it will shift the cursor to the right when writing to the dd ram / cg ram. now the display has no shift. 6 0 1 0 1 1 0 0 1 1 1 1 0 w_ write " w ". t he cursor is incremented by one and shifted to the right. 5.6. 8 - bit operation a nd 8 - digit 2 - line display (using internal reset) no. instruction display operation 1 power on. (SPLC783A starts initializing) power on reset. no disp lay. 2 function set db7 rs r/w db6 db5 db4 db3 db2 db1 db0 0 0 1 1 1 0 x x 0 0 set to 8 - bit operation and select 2 - line display line and 5 x 8 dot character font. 3 display on / off control 0 0 0 0 1 1 1 0 0 0 _ display on. cursor appear. 4 entry mode set 0 0 0 0 0 1 1 0 0 0 _ increase address by one. it will shift the cursor to the right when writing to the dd ram / cg ram. now the display has no shift. 5 write data to cg ram / dd r am 0 1 0 1 0 1 1 1 1 0 w_ write " w ". the cursor is incremented by one and shifted to the right. 6 : : : 7 write data to cg ram / dd ram 0 1 0 0 0 1 0 1 1 0 welcome_ write " e ". the cursor is incremented by one and shifted to the right. 8 set dd ram address 1 1 0 0 0 0 0 0 0 0 welcome _ it sets dd ram's address. the cursor is moved to the beginning position of the 2nd line. 9 write data to cg ram / dd ram 0 1 0 1 0 1 0 0 1 0 welcome t_ write " t ". the cursor is incremented by one and shifted to the right. 10 : : : 11 write data to cg ram / dd ram 0 1 0 1 0 1 0 0 1 0 welcome to part_ write " t ". the cursor is in cremented by one and shifted to the right. sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 12 mar . 10 , 200 5 version: 1. 4 no. instruction display operation 12 entry mode set 0 0 0 0 0 1 1 1 0 0 welcome to part_ when writing, it sets mode for the display shift. 13 write data to cg ram / dd ram 0 1 0 1 1 0 0 1 1 0 elcome o party_ write " y ". the cursor is incremented by one and shifted to the right. 14 : : : 15 return home 0 0 0 0 0 0 1 0 0 0 welcome to party both the display and the cursor return to the original position (address 0). 5.7. reset func tion at power on, SPLC783A starts the internal auto - reset circuit and executes the initial instructions. the initial procedures are shown as follows: power on wait time > 15 ms after vdd > 4.5v rs r/w db7 db6 db5 db4 db3 db3 db1 db0 0 0 0 0 1 1 x x x x wait time > 4.1 ms rs r/w db7 db6 db5 db4 db3 db3 db1 db0 0 0 0 0 1 1 x x x x wait time > 100 us rs r/w db7 db6 db5 db4 db3 db3 db1 db0 0 0 0 0 1 1 x x x x rs r/w db7 db6 db5 db4 db3 db3 db1 db0 0 0 0 0 1 1 n f x x 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 i/d s initialization ends bf cannot be checked before this instruction . function set ( interface is 8 bits length . ) bf cannot be checked before this instruction . function set ( interface is 8 bits length . ) bf cannot be checked before this instruction . function set ( interface is 8 bits length . ) bf can be checked after the following instructions . function set ( interface is 8 bits length . specify the number of display lines and character font . ) the number of display lines and character font cannot be changed afterwards . display off display clear entry mode set [ 8-bit interface ] wait time > 40ms after vdd > 2.7v sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 13 mar . 10 , 200 5 version: 1. 4 power on wait time > 15 ms after vdd > 4.5v rs r/w db7 db6 db5 db4 0 0 0 0 1 1 wait time > 4.1 ms wait time > 100 us bf cannot be checked before this instruction . function set ( interface is 8 bits length . ) bf cannot be checked before this instruction . function set ( interface is 8 bits length . ) bf cannot be checked before this instruction . function set ( interface is 8 bits length . ) bf can be checked after the following instructions . function set ( set interface to be 4 bits length) interface is 8 bits length . the number of display lines and character font cannot be changed afterwards . display off display clear entry mode set [ 4-bit interface ] function set ( interface is 4 bits length . specify the number of the display lines and character font . ) rs r/w db7 db6 db5 db4 0 0 0 0 1 1 rs r/w db7 db6 db5 db4 0 0 0 0 1 1 rs r/w db7 db6 db5 db4 0 0 0 0 1 0 0 0 0 0 1 0 0 0 n f x x 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 i/d s initialization ends wait time > 40ms after vdd > 2.7v sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 14 mar . 10 , 200 5 version: 1. 4 5.8. display data r am (d d ram ) the 80 - bit dd ram is normally used for storing display data. those dd ram not used for display data can be used as general data ram. its address is configured in the address counter. the relationships between display data ram address and lcd ? s position are depicte d as follows. 5.9. t iming generation circuit the timing generating circuit is able to generate timing signals to the internal circuits. in order to prevent the int ernal timing interface, the mpu access timing and the ram access timing are generated independently. 5.10. l cd driver circuit to ta l o f 1 6 c o m m o n s a n d 80 segments signal drivers are valid in the lcd driver circuit. when a program specifies the character fonts a nd line numbers, the corresponding common signals output drive - waveforms and the others still output unselected waveforms. 5.11. character generator r om (c g r om ) using 8 - bit character code, the character generator rom generates 5 x 8 dots or 5 x 10 dots characte r patterns. it also can generate 192s 5 x 8 dots character patterns and 64s 5 x 10 dots character patterns. 5.12. character generator r am (c g r am ) users can easily change the character patterns in the character generator ram through program. it can be writ ten to 5 x 8 dots, 8 - character patterns or 5 x 10 dots for 4 - character patterns. when the display shift operation is performed , the display data ram's address moves as : ( i ) left shift 01 02 03 04 05 06 06 07 ( ii ) right shift 08 4f 00 01 02 03 04 05 06 00 01 02 03 04 05 06 07 ( example ) 1-line display , 8 display characters display position 3 1 2 4 5 6 7 8 display data ram address 00 01 02 03 04 05 1-line display , 80 display characters 3 1 2 4 5 6 4e 4f display position 79 80 display data ram address sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 15 mar . 10 , 200 5 version: 1. 4 the following diagram shows the SPLC783A character patterns: correspondence between character codes and character patterns . f e d c b a 9 8 7 6 5 3 4 2 1 0 cg ram (1) cg ram (2) cg ram (3) cg ram (4) cg ram (5) cg ram (6) cg ram (7) cg ram (8) cg ram (1) cg ram (2) cg ram (3) cg ram (4) cg ram (5) cg ram (6) cg ram (7) cg ram (8) f 1 2 3 4 5 6 7 8 9 a b c e d 0 higher 4-bit (d4 to d7) of character code (hexadecimal) lower 4-bit (d0 to d3) of character code (hexadecimal) sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 16 mar . 10 , 200 5 version: 1. 4 the relationships between character generator ram addresses, character generator ram data (character patterns), and character codes are depicted as follows: 1. 5 x 8 dot character patterns note1: it means that the bit0~2 of the character code correspond to the bit3~5 of the cg ram address. note2: these areas are not used for display, but can be used for the general data ram. note3: when all of the bit4 - 7 of the character code are 0, cg r am character patterns are selected. note4: " 1 ": selected , " 0 " : no selected , " x " : do not care (0 or 1). note5: for example (1), set character code (b2 = b1 = b0 = 0, b3 = 0 or 1, b7 - b4 = 0) to display t . that means character code (00) 16,and (08) 16 can display t character. note6: the bits 0 - 2 of the character code ram is the character pattern line position. the 8th line is the cursor position and display is formed by logical or with the cursor. b6 b5 b4 b3 b2 b1 b0 b7 b5 b4 b3 b2 b1 b0 b6 b5 b4 b3 b2 b1 b0 b7 character code ( dd ram data ) cg ram address character patterns ( cg ram data ) 0 0 0 0 1 0 0 0 1 0 1 1 1 1 1 1 1 0 0 0 0 1 0 0 1 1 1 0 0 0 0 x x x x 1 1 1 1 0 0 1 0 1 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 1 1 1 1 1 0 0 0 1 0 0 1 1 1 0 0 0 0 x x x x 1 1 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 character pattern example (1) cursor position character pattern example (2) 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 1 1 0 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 17 mar . 10 , 200 5 version: 1. 4 2). 5 x 10 dot character patterns note1 : it means that the bit1~2 of the character code correspond to the bit4~5 of the cg ram address. note2: these areas are not used for display, but can be used for the gene ral data ram. note3: when all of the bit4 - 7 of the character code are 0, cg ram character patterns are selected . note4: " 1 : selected, " 0 : no selected, " x : do not care (0 or 1). note5: for example (1), set character code (b2 = b1 = 0, b3 = b0 = 0 o r 1, b7 - b4 = 0) to display u . that means all of the character codes (00) 16, (01) 16, (08) 16,and (09) 16 can display u character. note6: the bits 0 - 3 of the character code ram is the character pattern line position. the 11th line is the cursor p osition and display is formed by logical or with the cursor. b6 b5 b4 b3 b2 b1 b0 b7 b5 b4 b3 b2 b1 b0 b6 b5 b4 b3 b2 b1 b0 b7 character code ( dd ram data ) cg ram address character patterns ( cg ram data ) 0 0 0 0 1 0 0 0 1 0 1 1 1 1 1 1 0 0 1 0 0 1 1 1 0 0 0 0 x x x x 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 1 1 1 1 1 1 1 0 0 0 0 0 1 0 0 1 1 1 x x x 1 1 0 0 0 1 character pattern example (1) cursor position x 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 x x x x x 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 0 0 1 1 1 1 1 0 0 0 1 1 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 18 mar . 10 , 200 5 version: 1. 4 5.13. cursor/blink control circuit this circuit generates the cursor or blink in the cursor / blink control circuit. the cursor or the blink appears in the digit at the display data ram address defined in the address counter. when the address counter is (07) 16, the cursor position is shown as belows: in a 1-line display in a 2-line display 00 01 02 03 04 05 06 07 08 09 1 2 3 4 5 6 7 8 9 10 digit the cursor position 40 41 42 43 44 45 46 47 48 49 1st line 2nd line 00 01 02 03 04 05 06 07 08 09 1 2 3 4 5 6 7 8 9 10 digit the cursor position 0 0 0 0 1 1 1 ac b6 b5 b4 b3 b2 b1 b0 display position display data ram address ( hexadecimal ) display position display data ram address ( hexadecimal ) sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 19 mar . 10 , 200 5 version: 1. 4 5.14. interfacing t o m pu there are two types of data operations: 4 - bit and 8 - bit operations. using 4 - bit mpu, the int erfacing 4 - bit data is transferred by 4 - busline (db 4 to db 7 ). thus, db 0 to db3 bus lines are not used. using 4 - bit mpu to interface 8 - bit data requires two times transferring. first, the higher 4 - bit data is transferred by 4 - busline ( for 8 - bit operation , db7 to db4 ). secondly, the lower 4 - bit data is transferred by 4 - busline ( for 8 - bit operation, db3 to db0 ). for 8 - bit mpu, the 8 - bit data is transferred by 8 - buslines (db 0 to db7 ). example of 4 - bit data transfer timing seq uence sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 20 mar . 10 , 200 5 version: 1. 4 example of 8 - bit data transfer timing sequence 5.15. supply voltage f or l cd drive different voltages can be supplied to SPLC783As pins (v 5 - 1 ) for obtaining lcd drive - waveform. the relationships between bias, duty factor an d supply voltages are shown as belows: 1/8, 1/11 1/16 duty factor supply voltage 1/4 1/5 v1 vdd C 1/4 v lcd vdd C 1/5 v lcd v2 vdd C 1/2 v lcd vdd C 2/5 v lcd v3 vdd C 1/2 v lcd vdd C 3/5 v lcd v4 vdd C 3/4 v lcd vdd C 4/5 v lcd v5 vdd C v lcd vdd C v lcd sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 21 mar . 10 , 200 5 version: 1. 4 5.15.1. the power connections for lcd (1/4 bias, 1/5 bias) are shown belows: the bypass - capacitor improves the lcd display quality. the bias voltage must have the following relations: vdd ? v1 ? v2 R v 3 ? v4 ? v5. vdd v1 v2 v3 v4 v5 -v or gnd vdd ( +5.0v ) 1 / 4 bias (1/8,1/11 duty) r r r r vr v lcd v1 v2 v3 v4 v5 1 / 5 bias (1/16 duty) r r r r vr v lcd -v or gnd vdd ( +5.0v ) vdd vdd v1 v2 v3 v4 v5 -v or gnd 1 / 4 bias (1/8,1/11 duty) ( +5.0v ) vdd vr r r r r c c c c v1 v2 v3 v4 v5 1 / 5 bias (1/16 duty) -v or gnd vdd ( +5.0v ) vdd vr c c c c r r c r r r sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 22 mar . 10 , 200 5 version: 1. 4 5.15.2. the relationship between lcd frame ? s frequency and oscillator ? s frequency . (assume the oscillation frequency is 250khz, 1 clock cycle time = 4 .0 ? s) 5.15.2.1. 1/8 duty, type - b waveform 5.15.2.2. 1/11 d ut y, type - b waveform 5.15.2.3. 1/16 d ut y, type - b waveform 1 2 7 8 1 2 7 8 1 2 7 8 1 2 7 8 400 clocks com1 2 1 frame 1 frame 1 frame = 4( ? s) x 400 x 8 = 12800( ? s) = 12.8ms 78.1(hz) 12.8(ms) 1 frequency frame ? ? vdd v1 v4 v5 v2(v3) 1 2 10 11 1 2 400 clocks 2 1 frame 1 frame 10 11 1 2 1 frame = 4( ? s) x 400 x 11 = 17600( ? s) = 17.6ms (hz) 5 17.6(ms) 1 frequency frame 8 . 6 ? ? com1 vdd v1 v4 v5 v2(v3) 1 2 15 16 1 2 200 clocks vdd v1 v4 v5 com1 2 1 frame 1 frame 15 16 1 2 1 frame = 4( ? s) x 200 x 16 = 12800( ? s) = 12.8ms 78.1(hz) 12.8(ms) 1 frame frequency ? ? v3 v2 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 23 mar . 10 , 200 5 version: 1. 4 5.16. register --- ir (instruction register) and dr (data register) SPLC783A contains two 8 - bit registers: instruction register (ir) and data register (dr ). using combinations of the rs pin and the r/w pin selects the ir and dr, see below: rs r/w operation 0 0 ir write (display clear, etc.) 0 1 read busy flag (db7) and address counter (db 0 - db6 ) 1 0 dr write (dr to display data ram or character genera tor ram) 1 1 dr read (display data ram or character generator ram to dr) the ir can be written by mpu, but it cannot be read by mpu. 5.17. busy flag (bf) when rs = 0 and r/w = 1, the busy flag is output to db7. as the busy flag =1, SPLC783A is in busy state and does not accept any instruction until the busy flag = 0. 5.18. address counter (ac) the address counter assigns addresses to display data ram and character generator ram. when an instruction for address is written in ir, the address information is sent fr om ir to ac. after writing to/reading from display data ram or character generator ram, ac is automatically incremented by one (or decremented by one). the contents of ac are output to db 0 - db6 when rs = 0 and r/w = 1. 5.19. i/o port configuration 5.19.1. input por t: e 5.19.2. input port: r / w, rs 5.19.3. output port: clk1, clk2, m, d 5.19.4. input / output port: db 7 - 0 pmos nmos vdd pmos nmos pmos vdd vdd pmos nmos vdd pmos nmos vdd pmos data enable vdd vdd sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 24 mar . 10 , 200 5 version: 1. 4 6. electrical specifications 6.1. absolute maximum ratings characteristics symbol ra tings operating voltage vdd - 0.3v to +7.0v driver supply voltage v lcd vdd - 12v to vdd + 0.3v input voltage range v in - 0.3v to vdd + 0.3v operating temperature t a - 30 to + 80 storage temperature t sto - 55 to +125 note: stresses beyond those given i n the absolute maximum rating table may cause operational errors or damage to the device. for normal operational conditions see ac/dc electrical characteristics. 6.2. dc characteristics (vdd = 2.7 v to 4.5v , t a = 25 ) limit characteristics symbol min. typ. max. unit test con dition operating current i dd - 0.2 0.4 ma external clock (note) input high voltage v ih1 0.7vdd - vdd v input low voltage v il1 - 0.3 - 0.4 v pins:(e, rs, r/w, db 0 - db7 ) input high voltage v ih2 0.7vdd - vdd v input low volt age v il2 - 0.2 - 0.2vdd v pin osc1 input high current i ih - 1 .0 - 1 .0 ? a input low current i il - 5.0 - 15 - 30 ? a pins: (rs, r/w, db 0 - db7 ) vdd = 3.0v output high voltage (ttl) v oh1 2.0 - - v i oh = - 0.1ma pins: db 0 - db7 output low voltage (ttl) v ol1 - - 0.2vdd v i ol = 0.1ma pins: db 0 - db7 output high voltage (cmos) v oh2 0.8vdd - - v i oh = - 40 ? a, pins: clk1, clk2, m, d output low voltage (cmos) v ol2 - - 0.2vdd v i ol = 40 ? a, pins: clk1, clk2, m, d driver on resistance (com) r com - - 1 0 k ? i o = 50 ? a, v lcd = 4 .0 v pins: com1 - com16 driver on resistance (seg) r seg - - 15 k ? i o = 50 ? a, v lcd = 4 .0 v pins: seg 1 - seg80 lcd voltage v lcd 3.0 - 11 v vdd - v5, 1/4 bias or 1/5 bias note: f osc = 2 7 0khz, v dd = 3 .0 v, pin ( 3/565:'% 0 - db7 are open, all outputs are no loads. sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 25 mar . 10 , 200 5 version: 1. 4 6.3. ac characteristics (vdd = 2.7 v to 4.5v , t a = 25 ) 6.3.1. internal clock operation limit characteristics symbol min. typ. max. unit test condition osc frequency f osc1 190 270 350 khz vdd = 3 .0 v , rf = 75k ? 2% 6.3.2. external clock operation limit characteristics symbol min. typ. m ax. unit test condition external frequency f osc2 125 250 350 khz duty cycle 45 50 55 % rise/fall time tr, tf - - 0.2 ? s 6.3.3. write mode (writing data from mpu to SPLC783A) limit characteristics symbol min. typ. max. unit test condition e cycle time t c 1400 - - ns pin e e pulse width t pw 4 0 0 - - ns pin e e rise/fall time t r , t f - - 2 5 ns pin e address setup time t sp1 60 - - ns pins: rs, r/w, e address hold time t hd1 20 - - ns pins: rs, r/w, e data setup time t sp2 140 - - ns pins: db 0 - db7 data hold time t hd2 10 - - ns pins: db 0 - db7 6.3.4. read mode (reading data from SPLC783A to mpu) limit characteristics symbol min. typ. max. unit test condition e cycle time t c 1 4 00 - - ns pin e e pulse width t w 4 0 0 - - ns pin e e rise/fall time t r , t f - - 25 ns pin e address setup time t sp1 60 - - ns pins: rs, r/w, e address hold time t hd1 20 - - ns pins: rs, r/w, e data output delay time t d - - 360 ns pins: db 0 - db7 data hold time t hd2 5 .0 - - ns pin db 0 - db7 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 26 mar . 10 , 200 5 version: 1. 4 6.4. dc c haracteristics (vdd = 4.5 v to 5.5v , t a = 25 ) limit c haracteristics symbol min. typ. max. unit test condition operating current i dd - 0.4 0.6 ma external clock (note) input high voltage v ih1 2.2 - vdd v pins:(e, rs, r/w, db 0 - db7 ) input low voltage v il1 - 0.3 - 0.6 v input high voltage v ih2 v dd - 1 - vdd v pin osc1 input low voltage v il2 - 0.2 - 1.0 v pin osc1 input high current i ih - 1 .0 - 1 .0 ? a pins: (rs, r/w, db 0 - db7 ) vdd = 5.0v input low current i il - 20 - 50 - 100 ? a output high voltage (ttl) v oh1 2.4 - vdd v i oh = - 0. 205 ma pins: db 0 - db7 output low voltage (ttl) v ol1 - - 0.4 v i ol = 1 . 2 ma pins: db 0 - db7 output high voltage (cmos) v oh2 0.9vdd - vdd v i oh = - 40 ? a, pins: clk1, clk2, m, d output low voltage (cmos) v ol2 - - 0.1vdd v i ol = 40 ? a, pins: clk1, clk2, m, d driver on resistance (com) r com - - 10k k ? i o = 50 ? a, v lcd = 4 .0 v pins: com1 - com16 driver on resistance (seg) r se g - - 15k k ? i o = 50 ? a, v lcd = 4 .0 v pins: seg 1 - seg80 lcd voltage v lcd 3.0 - 11 v vdd - v5, 1/4 bias or 1/5 bias note: f osc = 2 7 0khz, vdd = 5 .0 v, pin e 3/565:'% 0 - db7 are open, all outputs are no loads. 6.5. ac characteristics (vdd = 4.5 v to 5.5v , t a = 25 ) 6.5.1. internal clock operation limit characteristics symbol min. typ. max. unit test condition osc frequency f osc1 190 270 350 khz vdd = 5 .0 v , rf = 91k ? 2% 6.5.2. external clock operation limit characteristics symbol min. typ. max. unit test condition external frequency f osc2 125 250 350 khz duty cycle 45 50 55 % rise/fall time tr, tf - - 0.2 ? s sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 27 mar . 10 , 200 5 version: 1. 4 6.5.3. write m ode (writing d ata from mpu to SPLC783A) limit characteristics symbol min. typ. max. unit test condition e cycle time t c 500 - - ns pin e e pulse width t pw 220 - - ns pin e e rise/fall time t r , t f - - 25 ns pin e address setup time t sp1 40 - - ns pins: rs, r/w, e address hold time t hd1 10 - - ns pins: rs, r/w, e data setup time t sp2 60 - - ns pins: db 0 - db7 data hold time t hd2 10 - - ns pins: db 0 - db7 6.5.4. read mode (reading d ata from SPLC783A to mpu) limit characteristics symbol min. typ. max. unit test condition e cycle time t c 500 - - ns pin e e pulse width t w 220 - - ns pin e e rise/fall time t r , t f - - 25 ns pi n e address setup time t sp1 40 - - ns pins: rs, r/w, e address hold time t hd1 10 - - ns pins: rs, r/w, e data output delay time t d - - 120 ns pins: db 0 - db7 data hold time t hd2 20 - - ns pin db 0 - db7 6.5.5. interface mode with lcd driver ( splc 100 a1 ) limit chara cteristics symbol min. typ. max. unit test condition clock pulse width high t pwh 800 - - ns pins: clk1, clk2 clock pulse width low t pwl 800 - - ns pins: clk1, clk2 clock setup time t csp 500 - - ns pins: clk1, clk2 data setup time t dsp 300 - - ns pins: d data hold time t hd 300 - - ns pins: d m delay time t d - 1000 - 1000 ns pins: m sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 28 mar . 10 , 200 5 version: 1. 4 6.5.6. write mode timing diagram (writing d ata from mpu to SPLC783A) 6.5.7. read mode timing diagram (reading d ata from SPLC783A to mpu) 6.5.8. interface mode with splc100a1 timing diagram rs r / w e db7 - 0 v ih1 v il1 v ih1 v il1 v il1 t sp1 t c valid data v ih1 v il1 v ih1 v il1 v ih1 v il1 v ih1 v il1 v il1 t hd1 t hd1 t f t p w t hd2 t sp2 t r v il1 rs r / w e db7 - 0 v ih1 v il1 v ih1 v il1 t sp1 t c valid data v ih1 v il1 v ih1 v il1 v ih1 v il1 v ih1 v il1 t hd1 t hd1 t f t p w t hd2 t r v il1 v ih1 v ih1 t d cl1 cl2 d m 0.9vdd 0.1vdd 0.1vdd t pwh t pwh t csp t csp t dsp t hd t d t pwl 0.9vdd 0.9vdd 0.9vdd 0.1vdd 0.9vdd 0.1vdd 0.1vdd sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 29 mar . 10 , 200 5 version: 1. 4 7. application circuits 7.1. r - oscillator 7.2. interface to mpu 7.2.1. interface to 8 - bit mpu (6805) 7.2.2. interface to 8 - bit mpu (z80) the oscillation resistor r f is used only for the internal oscillaotr operation mode. osc 1 osc 2 r f : 75k ? 2% ( when v dd = 3.0v) r f : 91k ? 2% ( when v dd = 5.0v) since the oscillation frequency varies depending on the osc 1 and osc 2 pin capacitance, the wiring length to these pins should be minimized. 0 200 400 0 100 200 300 400 rosc ( kohms ) fosc ( khz ) 75 270 0 200 400 600 0 100 200 300 400 rosc ( kohms ) fosc ( khz ) 91 270 vdd = 3.0v v dd = 5.0v pa0 | pa7 pb0 pb1 pb2 8 e rs r / w SPLC783A 16 80 lcd panel 16 commons x 80 segments 6805 db0 | db7 com1 | com16 seg1 | seg80 d0 | d7 8 e rs r / w SPLC783A 16 80 lcd panel 16 commons x 80 segments z80 a1 | a7 a0 7 iorq wr com1 | com16 seg1 | seg80 db0 | db7 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 30 mar . 10 , 200 5 version: 1. 4 7.3. SPLC783A application circuit 7.4. applications f or l c d 80 16 (8) v1 v2 v3 v4 v5 m vdd gnd clk1 clk2 m dl1 dl2 dr1 dr2 40 splc100a1 vee fcs shl1 shl2 vdd gnd v1 v2 v3 v4 v5 v6 m dl1 dl2 dr1 dr2 40 splc100a1 vee fcs shl1 shl2 vdd gnd v1 v2 v3 v4 v5 v6 clk1 clk2 m dl1 dl2 dr1 dr2 40 splc100a1 vee fcs shl1 shl2 vdd gnd v1 v2 v3 v4 v5 v6 seg80 | seg1 SPLC783A dot matrix lcd panel vdd ( +5.0v ) r r r r v r -v or gnd r c c y1-y40 com16 | com1 y1-y40 y1-y40 c c c (com8) clk1 clk2 clk1 clk2 com1 com8 seg1 seg80 SPLC783A lcd panel 16 characters x 1 line ( example 1 ) : 5 x 8 dots , 16 characters x 1 line [ 1 / 4 bias , 1 / 8 duty ] sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 31 mar . 10 , 200 5 version: 1. 4 com1 com11 SPLC783A lcd panel 16 characters x 1 line ( example 2 ) : 5 x 10 dots , 16 characters x 1 line [ 1 / 4 bias , 1 / 11 duty ] seg1 seg80 com1 com8 SPLC783A lcd panel 16 characters x 2 lines ( example 3 ) : 5 x 8 dots , 16 characters x 2 lines [ 1 / 5 bias , 1 / 16 duty ] com16 seg1 com9 seg80 seg1 seg80 SPLC783A ( example 4 ) : 5 x 8 dots , 32 characters x 1 line [ 1 / 5 bias , 1 / 16 duty ] com1 com8 com9 com16 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 32 mar . 10 , 200 5 version: 1. 4 com1 com8 SPLC783A lcd panel 8 characters x 2 lines ( example 5 ) : 5 x 8 dots , 8 characters x 2 lines [ 1 / 4 bias , 1 / 8 duty ] seg80 seg41 seg40 seg1 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 33 mar . 10 , 200 5 version: 1. 4 8. character generator rom 8.1. SPLC783A - 001 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 34 mar . 10 , 200 5 version: 1. 4 8.2. SPLC783A - 003 sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 35 mar . 10 , 200 5 version: 1. 4 9. package/pad locations 9.1. p ad assignment an d locations please contact sunplus sales representatives for more information. 9.2. package information c l1 d d1 e b e1 e a a2 a1 symbol min. nom. max. a - - 1.60 a1 0.05 - 0.15 a2 1.35 1.40 1.45 d 21.90 22.00 22.10 d1 19.90 20.00 20.10 e 15.90 16.00 16.10 e1 13.90 14.00 14.10 e 0.50 bsc. b 0.17 0.22 0.27 c 0.09 - 0.20 l1 1.00 ref unit: millimeter 9.3. ordering information product number package type SPLC783A - nnnv - c chip form SPLC783A - nnnv - pl11 package form - lqfp 128 * SPLC783A - nnnv - hl11 green pac kage form - lqfp 128 ** note1: code number is assigned for customer. note 2 : code number ( n = a - z or 0 - 9, nn = 00 - 99); version ( v = a - z). sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 36 mar . 10 , 200 5 version: 1. 4 9.4. storage condition and period for package package moisture sensitivity level max. reflow temperature floor li fe storage condition dry pack * lqfp level 3 220 +5/ - 0 168hrs @ 30 / 60% r.h. Q yes ** lqfp level 3 255 +5/ - 0 168hrs @ 30 / 60% r.h. Q yes note 1: please refer to ipc/jedec standard j - std - 020a and eia jedec stand jfsd22 - a112 note2: or refer to the caution note on dry pack bag. 9.5. recommended smt temperature profile this recommended temperature profile is a rough guideline for smt process reference. most of sunplus leadframe base product choice matte tin and sn/bi for plating recipe. for ppf(pre - plated frame) product with 63/37 solder paste, we recommend 2 40 ~245 for peak temperature. sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 37 mar . 10 , 200 5 version: 1. 4 10. disclaimer the information appearing in this publication is believed to be accurate. integrated circuits sold by sunplus technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. sunplus makes no warranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringement. further, sunplus makes no warranty of me rchantability or fitness for any purpose. sunplus reserves the right to halt production or alter the specifications and prices at any time without notice. accordingly, the reader is cautioned to verify that the data sheets and other information in this p ublication are current before placing orders. products described herein are intended for use in normal commercial applications. applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equi pment, are specifically not recommended without additional processing by sunplus for such applications. please note that application circuits illustrated in this document are for reference purposes only. sunplus confidential for partminer use only
SPLC783A ? sunplus technology co., ltd. proprietary & confidential 38 mar . 10 , 200 5 version: 1. 4 11. revision history date revision # description pa ge mar. 10, 2005 1.4 1 . modify 8.1 and 8.2 code numbers from 2 digits to 3 digits 2 . a dd green package product number 3. add sections 9. 4 and 9. 5 4. correct pin name: from rw to r/w 3 3 , 3 4 35 36 5, 9 19, 20 apr. 01, 2004 1.3 1. add min. and max. value in instruction table 2. add 8 - bit/4 - bit data transfer timing sequence example 9 19 - 20 nov. 25, 2003 1.2 1. add package information: lqfp 128 pin 2. remove 9. package/pad locations 5, 6, 34 sep. 27, 2002 1.1 correct 9. package/pad locations 31 - 33 oct . 02 , 2001 1.0 original sunplus confidential for partminer use only

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